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AMD Zen 3 New CPU Architecture, Higher IPC Gains, Faster Clocks & Higher Core Counts

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Old 19-11-2019, 10:58 PM   #1
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AMD Zen 3 New CPU Architecture, Higher IPC Gains, Faster Clocks & Higher Core Counts

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AMD's Third-Gen Epyc CPUs (Milan)

Norrod also had some interesting comments about the performance gains that will be delivered by AMD's third-gen Epyc CPUs, which are codenamed Milan and expected to enter production around Q3 2020.

When asked about what kind of performance gain Milan's CPU core microarchitecture, which is known as Zen 3, will deliver relative to the Zen 2 microarchitecture that Rome relies on in terms of instructions processed per CPU clock cycle (IPC), Norrod observed that -- unlike Zen 2, which was more of an evolution of the Zen microarchitecture that powers first-gen Epyc CPUs -- Zen 3 will be based on a completely new architecture.

Norrod did qualify his remarks by pointing out that Zen 2 delivered a bigger IPC gain than what's normal for an evolutionary upgrade -- AMD has said it's about 15% on average -- since it implemented some ideas that AMD originally had for Zen but had to leave on the cutting board. However, he also asserted that Zen 3 will deliver performance gains "right in line with what you would expect from an entirely new architecture."

Milan's performance should also benefit some from moderately higher CPU clock speeds, thanks to its expected use of a more advanced, 7-nanometer (7nm), Taiwan Semiconductor (TSM) manufacturing process than the 7nm TSMC process used by Rome.

Speaking in general about its performance expectations, Norrod said -- at a time when Intel is promising double-digit IPC gains for future microarchitectures -- AMD is "confident [in] being able to drive significant IPC gains each generation." He also indicated that AMD's server CPU launches are set to rely on the "tick-tock" cadence that was once the hallmark of Intel CPU launches, with the launch of a CPU platform that relies on a new manufacturing process node but the same microarchitecture as the last platform (the "tick") followed by a platform that relies on a new microarchitecture but the same manufacturing process node (the "tock").

In this context, Rome represents a tick, thanks to its use of a 7nm process that's much more advanced than the 14nm process used by Naples, while Milan represents a tock, since it will feature a new microarchitecture but rely on a 7nm process. And presumably, AMD's fourth-gen Epyc platform -- it's codenamed Genoa, due in 2021 and expected by many to rely on TSMC's next-gen, 5nm, process node -- will represent another tick.

Driving Core Counts Higher

Whereas the most powerful Naples CPUs have 32 cores, the most powerful Rome CPUs have twice as many. And Norrod indicated that over time, AMD wants to keep driving core counts higher as manufacturing processes improve.

"There's a number of application areas that just continue to benefit from increasing core counts and increasing compute density," Norrod said. However, he emphasized that AMD also wants to make sure that it takes "a balanced approach" to increasing things such as compute density, memory bandwidth and I/O connectivity, so that additional horsepower isn't left "stranded" due to a bottleneck elsewhere.
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