Who waiting for Intel Alder Lake? (12900K is 39% faster than 5950X)

astones153

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I cant wait for Alder lake to do well so I can get my AMD chips cheep cheep

Tbh I'm way more interested in how their i5/i7 SKUs compare to Ryzen's R5/R7, especially 12600k/12400 vs 5600x. If at the same ddr4 speeds the 12th gen i5 can blow out the 5600x at similar prices, the MSRP makes a lot less sense.
 

elmariachi

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Nothing new here. Same stuff different name. 1st year it's expensive and boards are buggy, second year AMD and Intel start figuring out how to optimize their IMC for it, year 3 speeds are up, latencies down, and prices stabilize (market trends and S&D aside), architecture is mature and so on.

Intel's Alderlake will allow DDR4 variants at a huge expense. Alderlake has 2 IMCS. If you run DDR4, only 1 IMC will function. Not to mention it's a FIVR CPU. Will run even hotter than the current 11th Gen which already runs hot. The last FIVR CPU was Haswell and that was a nightmare for taming heat.

Sure performance is good but DDR5 at current high latency is bad unless the whole architecture somehow is able to compensate which I find doubtful.

Next gen Intel and AMD best to hold out till DDR5 matures as with stability. Glad I went 11th Gen to tide out this phase which not only be expensive but a platform for more mass testing.

The Z690+Alderlake is already ready for primetime. Intel and Board manufacturers are now actually optimizing the platform for DDR5 latencies with Intel releasing new CPU microcodes almost every week addressing performance enhancements for DDR5.
 
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elmariachi

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It is also interesting to see the advancement of the same 14nm from Intel 5th gen to 10th gen if not compare to amd outsource manufacturing process.


All I know is that Bob Swan screwed Intel over the last 5 years. With Pat Gelsinger and Glenn Hinton back at Intel now, I would expect Intel to be much more innovative over the coming years with CPU technology. 12th Gen is a step in the right direction though the transition to DDR5 is a problem. This is the problem that AMD would also phase and it's really up to how the CPUs are designed to use DDR5.
 

wwenze

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Alderlake has 2 IMCS.

Lol.

Skylake can do DDR3 and DDR4, Phenom can do DDR2 and DDR3. Go and check if they have two IMCs or not.

You might be overestimating the complexity of things
 

elmariachi

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Lol.

Skylake can do DDR3 and DDR4, Phenom can do DDR2 and DDR3. Go and check if they have two IMCs or not.

You might be overestimating the complexity of things
Skylake and Phenom does not have memory controllers that runs at different gears for different speeds. Alderlake, according to those testing it right now, says ddr4 with Alderlake has a huge penalty hit as only 1 IMC works for bandwidth.

Yes, they may be wrong or it could be there is 1 IMC that is configured to run between Gear 1 to Gear 4. We won't know till launch day at least.
 

Yongkit

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All I know is that Bob Swan screwed Intel over the last 5 years. With Pat Gelsinger and Glenn Hinton back at Intel now, I would expect Intel to be much more innovative over the coming years with CPU technology. 12th Gen is a step in the right direction though the transition to DDR5 is a problem. This is the problem that AMD would also phase and it's really up to how the CPUs are designed to use DDR5.
Ya it's good for 12th Gen Intel.

My real concern really on the motherboard cost since every new gen CPU need a new gen motherboard to better support it's technology but with same 14nm manufacturing process.
 

elmariachi

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Ya it's good for 12th Gen Intel.

My real concern really on the motherboard cost since every new gen CPU need a new gen motherboard to better support it's technology but with same 14nm manufacturing process.
AMD would be in the same exact position moving forward but we won't know AM5's roadmap on what supported. Those transitioning to new platforms on DDR5 are in the same situation. Intel boards has always been more expensive and I don't expect that to change.
 

wwenze

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The "Gear" in ADL is just the divider ratio, we already see Ryzen able to do 1:2 ratio.

With max JEDEC DDR5 speeds at 8400, gear4 shouldn't be needed most of the time. Assuming our memory PHY even works at those speeds. We are pushing the limits of physics.
 

watzup_ken

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it's not AMD's fabrication technology
it's TSMC's
if Intel and AMD both use the same nm,
Intel will win.
Sorry I don't get your point. The competition is not about the fab that you use. It doesn't matter if Intel or AMD is using a more advance fab or not. Intel can't produce 7nm, and that is a fact. If you claim this is cheating, then Intel have been cheating for even longer because Intel always had the fab advantage in the past isn't it? Bulldozer was 28nm, and Intel was on 14nm. Cheating here? The playing ground is not not level from a fab perspective, but that is how it is. At the end of the day, people look at performance vs power consumption. Having said that, it is rumoured that Intel's 10nm is comparable to TSMC's 7nm.
 

wwenze

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Intel's Alderlake will allow DDR4 variants at a huge expense. Alderlake has 2 IMCS. If you run DDR4, only 1 IMC will function.

I think I figured out what you're referring to after reading more of the post for context

Are you perhaps referring to the fact that DDR5 allows for a 64-bit memory module to be addressed as 2 independent 32-bit channels? While DDR4 is just... "normal" 64-bits, I guess

DIMM-DDR5.png


But in terms of circuit or circuit blocks, this is no different from one IMC simply having more memory channels. We don't call dual-channel CPUs as having two IMCs, quad-channel CPUs as having 4 IMCs, no?
 

watzup_ken

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Just upgrade and blast aircon while playing computer for the computer and player will do. :)
If I need to blast my air conditioner just to use my computer every time, I think it is catastrophic. I think I will stick to my M1 Mac for my daily usage, other than for games.
 

watzup_ken

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All I know is that Bob Swan screwed Intel over the last 5 years. With Pat Gelsinger and Glenn Hinton back at Intel now, I would expect Intel to be much more innovative over the coming years with CPU technology. 12th Gen is a step in the right direction though the transition to DDR5 is a problem. This is the problem that AMD would also phase and it's really up to how the CPUs are designed to use DDR5.
I feel it was a problem since Brian's days and got handed over nicely to Bob. I don't believe the failure to deliver 10nm started when Bob Swan took over. So basically Intel was already falling backwards, but perhaps Bob just took things too easy and caused further delays.
 

wwenze

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While looking for the block diagram I found something interesting:

intel-alder-lake-block-diagram-100899804-orig.jpg


Look at the size of the efficiency cores relative to the performance

Instead of 8P + 8E can we spam 40 efficiency cores and see where does that take us for Cinebench?
 

elmariachi

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The "Gear" in ADL is just the divider ratio, we already see Ryzen able to do 1:2 ratio.

With max JEDEC DDR5 speeds at 8400, gear4 shouldn't be needed most of the time. Assuming our memory PHY even works at those speeds. We are pushing the limits of physics.

Or it could be that Gear 4 works only with DDR4 and that it has 1 IMC. No one knows for sure.
 

elmariachi

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While looking for the block diagram I found something interesting:

intel-alder-lake-block-diagram-100899804-orig.jpg


Look at the size of the efficiency cores relative to the performance

Instead of 8P + 8E can we spam 40 efficiency cores and see where does that take us for Cinebench?
These small and big cores will only be fully realised on Windows 11 where the new scheduler 'Intel Thread Director' is being debut. Alderlake essentially will be optimized on Windows 11 at launch not sure if they will actually have a dedicated scheduler that will be supported on Windows 10 for Alderlake.
 
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Sorry I don't get your point. The competition is not about the fab that you use. It doesn't matter if Intel or AMD is using a more advance fab or not. Intel can't produce 7nm, and that is a fact. If you claim this is cheating, then Intel have been cheating for even longer because Intel always had the fab advantage in the past isn't it? Bulldozer was 28nm, and Intel was on 14nm. Cheating here? The playing ground is not not level from a fab perspective, but that is how it is. At the end of the day, people look at performance vs power consumption. Having said that, it is rumoured that Intel's 10nm is comparable to TSMC's 7nm.

Intel now also using TSMC liao.
Let's see.
 
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